New pages

6 February 2026

• 16:3216:32, 6 February 2026 OPOS91 (hist | edit) [289 bytes] JulienB (talk | contribs) (Created page with "Category: OPOS91 {{Under_Construction}} ==Description== The [https://www.opossom.com/english/product-opos91/index.html OPOS91] is a high-end [https://en.wikipedia.org/wiki/Single-board_computer Single Board Computer] targeted for advanced GUI and extended connectivity at low price.")

30 January 2026

• 18:3318:33, 30 January 2026 Test Mermaid (hist | edit) [342 bytes] JulienB (talk | contribs) (Created page with "{{#mermaid:sequenceDiagram participant Alice participant Bob Alice->John: Hello John, how are you? loop Healthcheck John->John: Fight against hypochondria end Note right of John: Rational thoughts <br/>prevail... John-->Alice: Great! John->Bob: How about you? Bob-->John: Jolly good! }}")
• 15:1915:19, 30 January 2026 EMMC OPOS93 (hist | edit) [5,434 bytes] SebastienSz (talk | contribs) (Created page with "Category: eMMC = OPOS93 eMMC layout = By default, the 8GB eMMC on OPOS93 module has 4 physical/hardware partitions: {| border="1" cellpadding="10" cellspacing="0" summary="OPOS93 eMMC partitions" |---------------- | style="width:80px;background:orange;" align="center" | Boot0 | style="width:80px;background:orange;" align="center" | Boot1 | style="background:red;" | RPMB | style="width:500px;background:green;color:white;" align="center" | User Data |} {| bord...")

9 October 2025

• 17:3017:30, 9 October 2025 FPGA registers access from Linux kernel on OPOS93 SP (hist | edit) [322 bytes] KevinJ (talk | contribs) (Created page with "Category:FPGA Category: OPOS93_SP == Introduction == Users should be able to develop their own Linux driver for their custom IPs through ''FlexIO Armabus''. == gpio-flexio-armabus example Linux driver == You can find an example driver in your Linux build repository under ''drivers/gpio/gpio-flexio-armabus.c''")
• 09:3909:39, 9 October 2025 FPGA registers access from Linux userspace on OPOS93 SP (hist | edit) [737 bytes] KevinJ (talk | contribs) (Created page with "Category:FPGA Category: OPOS93_SP")
• 09:3309:33, 9 October 2025 FPGA registers access from Linux userspace on APF6 SP (hist | edit) [383 bytes] KevinJ (talk | contribs) (Created page with "Category:FPGA Category: APF6_SP == Introduction == For '''APF6_SP''' registers access are done with PCIe == PCIe == On APF6_SP FPGA memory is accessed with PCIe, to read/write on FPGA space an example is available with pci_debug. === Pci_debug === See pci_debug page to know how to access PCIe address space with a command line tool.")

3 October 2025

• 17:0417:04, 3 October 2025 OPOS93 SP FPGA configuration (hist | edit) [1,084 bytes] KevinJ (talk | contribs) (Created page with "Category: OPOS93_SP Category: FPGA == Using Linux == === Prerequisites == Please ensure that the Efinity project is configured as such: * Generate '''.hex.bin''' file (found under the ''outflow'' directory) * The bitstream should be in a '''SPI 8b passive''' format == Using Efinity via JTAG == {{Warning| Configuring the FPGA using Efinity programmer is currently broken.}}")
• 16:1616:16, 3 October 2025 Efinity (hist | edit) [1,265 bytes] KevinJ (talk | contribs) (Created page with "Category: FPGA Category: Efinix https://www.efinixinc.com/products-efinity.html Product page")
• 16:1316:13, 3 October 2025 OPOS93 SP FPGA designing (hist | edit) [2,596 bytes] KevinJ (talk | contribs) (Created page with "Category: OPOS93_SP Category: FPGA == Requisites == You'll need to install Efinity in order to synthetise your design for the embedded Efinix Trion T20. == Starting from a template project == Template projects for Chisel or Verilog/VHDL development are publicly available on the [https://git.armadeus.com/armadeus/armadeus-gateware/flexio-wishbone-wrapper flexIO to Wishbone bus wrapper repository]. == Chisel == # Install [https://www.scala-sb...")
• 14:3514:35, 3 October 2025 APF6 SP FPGA designing (hist | edit) [906 bytes] KevinJ (talk | contribs) (Created page with "Category: APF6_SP Category: FPGA === Quartus configuration === Your design must include the PCIe and CvP components. Once the project synthesized, open the menu: <pre class="config"> File -> Convert Programming Files ... </pre> * In '''Output programming file''' select the '''programming file type:''' Raw Binary File (.rbf). * In '...")
• 12:5612:56, 3 October 2025 APF6 SP FPGA configuration (hist | edit) [2,891 bytes] KevinJ (talk | contribs) (Created page with "Category: APF6_SP Category: FPGA == Configuring from Linux == 1. Load ''periph.rbf'' to the FPGA from U-Boot 2. Use the FPGA loader linux driver to load ''core.rbf'' {{Note| On '''APF6_SP''', the command load_fpga work only throught PCIe, see PCIe fpga load to know how it works}}")
• 12:3612:36, 3 October 2025 APF51 FPGA configuration (hist | edit) [0 bytes] KevinJ (talk | contribs) (Created page with "Category: APF51 Category: FPGA == Configuring from Linux == Please use the FPGA loader linux driver.")
• 12:3612:36, 3 October 2025 APF27 FPGA configuration (hist | edit) [0 bytes] KevinJ (talk | contribs) (Created page with "Category: APF27 Category: FPGA == Configuring from Linux == Please use the FPGA loader linux driver.")
• 12:3212:32, 3 October 2025 APF9328 APF27 APF51 OPOS6UL SP FPGA configuration (hist | edit) [5,371 bytes] KevinJ (talk | contribs) (Created page with "Category: APF9328 Category: FPGA == Configuring from Linux == Please use the FPGA loader linux driver.") originally created as "APF9328 FPGA configuration"

23 September 2025

• 13:5713:57, 23 September 2025 OPOS93 SP (hist | edit) [475 bytes] FabienM (talk | contribs) (Created page with "== Description == [https://www.opossom.com/english/product-opos93sp/index.html OPOS93SP] is a SoM derivated from [https://www.opossom.com/english/product-opos93sp/index.html OPOS93] with a FPGA [https://www.efinixinc.com/shop/t20.php Trion T20] produced by Efinix. === FPGA === * Trion T20")