OPOS93 SP FPGA configuration: Difference between revisions

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(Created page with "Category: OPOS93_SP Category: FPGA == Using Linux == === Prerequisites == Please ensure that the Efinity project is configured as such: * Generate '''.hex.bin''' file (found under the ''outflow'' directory) * The bitstream should be in a '''SPI 8b passive''' format == Using Efinity via JTAG == {{Warning| Configuring the FPGA using Efinity programmer is currently broken.}}")
 
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== Using Linux ==
== Using Linux ==


=== Prerequisites ==
=== Prerequisites ===


Please ensure that the [[Efinity]] project is configured as such:
Please ensure that the [[Efinity]] project is configured as such:
*  Generate '''.hex.bin''' file (found under the ''outflow'' directory)
*  Generate '''.hex.bin''' file (found under the ''outflow'' directory)
* The bitstream should be in a '''SPI 8b passive''' format
* The bitstream should be in a '''SPI 8b passive''' format
=== Configuration ===
The ''flexio-armabus'' kernel driver will configure the FPGA via SPI as soon as it is loaded.
Please copy your '''<YOUR_PROJECT>.hex.bin''' to ''/lib/firmware/fpga/bitstream.bin'' on the board and either reboot, or unload and reload the module:
<pre class="apf">
# rmmod flexio-armabus
# modprobe flexio-armabus
</pre>


== Using Efinity via JTAG ==
== Using Efinity via JTAG ==


{{Warning| Configuring the FPGA using Efinity programmer is currently broken.}}
{{Warning| Configuring the FPGA using Efinity programmer is currently broken.}}

Revision as of 18:11, 3 October 2025


Using Linux

Prerequisites

Please ensure that the Efinity project is configured as such:

  • Generate .hex.bin file (found under the outflow directory)
  • The bitstream should be in a SPI 8b passive format

Configuration

The flexio-armabus kernel driver will configure the FPGA via SPI as soon as it is loaded. Please copy your <YOUR_PROJECT>.hex.bin to /lib/firmware/fpga/bitstream.bin on the board and either reboot, or unload and reload the module:

 # rmmod flexio-armabus
 # modprobe flexio-armabus

Using Efinity via JTAG

Warning Warning: Configuring the FPGA using Efinity programmer is currently broken.