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| [[Category:POD]]
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| This is the roadmap of POD :
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| * POD 1.0 :
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| ** VHDL Intercon generation
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| ** VHDL top generation
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| ** ARMadeus 4.0 templates available for multiple instances of a component
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| * POD 1.1 :
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| ** platform and library out of POD repository (?)
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| ** Manage FPGA IOs settings with FPGA configuration files for each type of FPGA.
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| ** Library documentation generator.
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| * POD 2.0 :
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| ** Adding Verilog HDL language
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| ** Generate SystemC testbench
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| ** Manage Verilog to SystemC conversion (with verilator) for testbench
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