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| [[Category:FPGA]]
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| [[Category: PCIe]]
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| == Introduction ==
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| On APF6_SP PCI express bus is used to configure the FPGA (cycloneV). This article describe how to do that.
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| == Generate files ==
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|
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| === Quartus configuration ===
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| Your design must include the [[IMX6-CycloneV_interface_description#Qsys_.28Quartus.29_:_Avalon-MM_Cyclone_V_Hard_IP_for_PCI_Express_configuration_.28CvP.29 | PCIe and CvP components]]. Once the project synthesized, open the menu:
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| <pre class="config">
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| File -> Convert Programming Files ...
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| </pre>
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|
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| * In '''Output programming file''' select the '''programming file type:''' Raw Binary File (.rbf).
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| * In '''Input files to convert''' clic on '''Add Files...''' and add your binary.sof file.
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| * In '''Output programming file''' check the option Create CvP files (Generate binary.periph.rbf and binary.core.rbf)
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| * Click on '''Generate'''
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| You will get two files:
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| * '''binary.periph.rbf''': peripheral config file to be loaded via serial config bus with U-Boot
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| * '''binary.core.rbf''': core config file to be loaded via PCIe bus with Linux.
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| === Linux configuration ===
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| All drivers are already selected by default in APF6's Buildroot configuration.
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| == Configure the FPGA ==
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| === Peripheral configuration in uboot ===
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| PCIe must be activated before Linux boot. To do that, just load the peripheral bitstream with uboot :
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| <pre class="apf">
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| BIOS> tftpboot ${loadaddr} 192.168.0.117:binary.periph.rbf
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| BIOS> fpga load 0 ${loadaddr} ${filesize}
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| </pre>
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| Then boot Linux:
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| <pre class="apf">
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| BIOS> boot
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| </pre>
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| === Core configuration in Linux ===
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| The PCIe device must be seen in lspci command in Linux :
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| <pre class="apf">
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| # lspci
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| 00:00.0 PCI bridge: Device 16c3:abcd (rev 01)
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| 01:00.0 Unclassified device [0013]: Altera Corporation Device e001 (rev 01)
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| </pre>
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| You can then download the core (192.168.0.2 should be replaced with your Host PC IP address):
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| <pre class="apf">
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| $ tftp -g -r binary.core.rbf 192.168.0.2
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| $ load_fpga output_file.core.rbf
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| Altera CvP 0000:01:00.0: Now starting CvP...
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| Altera CvP 0000:01:00.0: CvP successful, application layer now ready
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| </pre>
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|
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| === Automatic FPGA configuration ===
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| To let apf configure the FPGA automatically at boot we have to configure U-boot and Linux as seen in the following.
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| ==== U-boot ====
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| See the [[Target_Software_Installation#APF6_SP | target software installation]] to know how to install a ''firmware autoload'' on U-Boot.
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| ==== Linux ====
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| Once Linux booted, the core must be loaded via PCIe. This can be done with an init.d script:
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| * Copy the bitstream '''firmware.core.rbf''' in target directory : '''/lib/firmware/fpga/'''
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| * Create a file in '''/etc/init.d/''' named '''S80firmware''' for example.
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| * Edit it with these lines:
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| <source lang="bash">
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| load_fpga /lib/firmware/fpga/firmware.core.rbf
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| </source>
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| * Then add execution right for the script :
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| <pre class="apf">
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| $ chmod +x /etc/init.d/S80firmware
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| </pre>
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|
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| * Reboot the board:
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| <pre class="apf">
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| $ reboot
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| </pre>
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| == Links ==
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